The present invention relates to an improvement to a process for positioning an interconnection line on an electrical contact hole of an integrated circuit described in French patent application No. 2525389, filed on Apr. 14th 1982 in the name of C.E.A.
The process described in the aforementioned patent application is a process for positioning an interconnection line on an electrical contact hole of an integrated circuit where, after producing the electrical contact hole, the following stages are successively performed:
deposition of a conductive coating on to the complete integrated circuit and the interconnection line is produced thereon, PA1 depositing on the conductive coating of an insulating coating obliterating the relief thereof and providing a planar surface, PA1 etching the insulating coating, so that insulant is only left behind at the location of the electrical contact hole, PA1 deposition of a resin layer on the integrated circuit, so as to mask the interconnection line to be produced, PA1 etching part of the conductive coating, which is free from resin and the remaining insulating coating, and, PA1 elimination of the remaining insulating coating and the resin layer. PA1 deposition on the complete integrated circuit of a conductive coating, in which the interconnection line will be produced, PA1 deposition on the conductive coating of an insulating coating obliterating the relief thereof and having a planar surface, PA1 deposition of a coating of non-reflecting material on the insulating coating, PA1 deposition of a photosensitive resin coating on the intermediate coating and production of the image of the interconnection line to be produced in said resin coating, PA1 etching the non-reflecting, mask-free region of the material coating, PA1 elimination of the mask and etching the insulating coating of the regions not protected by the intermediate coating, the latter being stopped as soon as the region of the conductive coating located outside the contact hole is exposed, PA1 etching that part of the conductive coating free from the insulating coating, and PA1 elimination of the insulating coating and the remaining non-reflecting material.
According to a preferred embodiment of this process, the insulating coating is a resin coating.
This process, which permits an autopositioning of the interconnected line on the electrical contact hole suffers from the disadvantage that the accuracy of producing the etches of the conductive lines is not very high.
Thus, in the aforementioned process, the image of the interconnections are produced in the photosensitive resin layer according to standard photolithography processes. The reflecting nature of the coating to be etched (metallic coating) produces interferences in the photosensitive resin layer, which deteriorates the quality of the image of the interconnections and more particularly produces line width variations during the operating passages.